1. Number Systems & Codes
Introduction, Decimal Number System, Binary Number System, Decimal to Binary Conversion, Binary to Decimal Conversion, Octal Number System, Decimal to Octal Conversion, Octal to Decimal Conversion, Octal to Binary Conversion, Binary to Octal Conversion, Hexadecimal Number System, Decimal to Hexadecimal Conversion, Hexadecimal to decimal conversion, Hexadecimal to Binary Conversion, Hexadecimal to Octal Conversion, Arithmetic Operations, Binary Arithmetic, Octal arithmetic, Hexadecimal Arithmetic, Hexadecimal Addition, Hexadecimal Subraction, Complements, Diminished Radix Complement [(r – 1)’s complement], 1s Complement, 9’s Complement, 7’s Complement, 15’s Complement, Radix Complement (r’s complement), 2’s Complement, 10’s Complement, 8’s Complement, 16’s Complement, Subtraction using complements, Subtraction using 1s complement, Subtraction using 2’s complement, Comparison between 1s complement and 2’s complement, Subtraction using 9’s complement, Subtraction using 10’s complement, Sign Magnitude Representation, 1s Complement form for signed number, 2’s Complement form, Range of signed integer numbers that can be represented, Binary Coded Decimal (BCD), BCD Arithmetic, BCD Subtraction, Codes, Weighted Decimal Codes, 2421 code, Bi quinary code (5 0 4 3 2 1 0), Non Weighted Codes, Excess–3 code, Properties of Excess–3 Code, Gray Code, Properties of Gray Code, Conversion of binary code into gray code, Conversion of gray code into binary, Application of Gray Code, Alphanumeric Code, ASCII Code, EBCDIC Code, Error Detecting Code, Parity Method, Error Correcting Codes, Floating Point Numbers, Radix Conversion, Exercise.
2. Boolean Algebra & Logic Gates
Introduction, Boolean Algebra, Laws of Boolean Algebra, Associative law, Commutative law, Distributive law, Basic Theorems of Boolean Algebra, De Morgan’s Theorem, Principle of Duality or Duality Theorem, Digital Logic, Logic Gates, Basic Logic Gates, Universal Gate, Exclusive–OR Gate, Exclusive–NOR Gate, Boolean Function, Simplification of Boolean function using Boolean Algebra, Logic Diagram from Boolean Expression, Boolean Expression from Logic Diagram, Boolean Expression from Switching Circuit, Conversion of logic diagrams to universal logic, Realisation of various logic gates using NAND gates, Realisation of various logic gates using NOR gates, Implementation of Different Boolean Expression to UNIVERSAL Logic, NAND gate realizations, NOR gate realization, Exercise.
3. Minimization Techniques
Introduction, Normal Formulas, Sum of product (SOP), Product of Sum (POS), Minterm, Canonical (Standard) Sum of Product Form, Conversion of any Boolean Function into Canonical Sum of Product Form, Maxterm, Canonical (Standard) Form of Product of Sum (POS), Conversion of a Boolean Function into Canonical Product of Sum Form, Conversion of SOP to POS AND Vice–Versa, Karnaugh Map (K–maps), Looping or Grouping of Variables in K–Map, K–map Simplification, Minimization of K–map with Redundant Groups, Don’t Care Combinations or Incompletely Specified Function, Five Variable K–map, Quine–MC' cluskey (Tabular) Method, Multiple Output Circuits, Variable – Entered K–maps OR variable mapping, Cubical Representation, Two Dimensional Cube, Three Dimensional Cube, Four Dimensional Cube, Exercise.
4. Combinational Circuit
Introduction, Design of combinational circuit, Arithmetic Circuits, Adder, Half Adder, Full Adder, Implementation of Full adder using two Half Adders, Subtractor, Half Subtractor, Full Subtractor, Binary Adder, Binary Parallel Adder, Binary Adder/Subtractor, Fast Adders, Carry Look Ahead Adder, Serial Adder, Serial Subtractor, BCD Adder, Binary Multiplier, Multiplexer, Four to one multiplexer, Eight to one multiplexer, Multiplexer with an Enable input, Higher Order Multiplexer, Implementation of Boolean Expression using Multiplexer, Demultiplexer, 1 : 4 Demultiplexer, 1 : 8 Demuliplexer, Decoder, 3 to 8 Decoder, Decoder with Enable input, BCD to Decimal Decoder, BCD to 7 Segment Decoder, Binary to Gray Code Decoder, Encoder, Octal to Binary Encoder, BCD to Excess–3 encoder, Diode Swithcing Matrix, Exercise.
5. Sequential Circuit
Introduction, Flip–flop, SR Flip–Flop, Clocked RS Flip–Flop, D–Flip Flop (Delay Flip Flop), JK Flip Flop, T Flip Flop, Triggering of Flip Flops, Edge Triggered D Flip Flop, Edge Triggered JK Flip Flop, Master Slave Flip Flop, Analysis of Clocked Sequential Circuits, Designing of Sequential Circuits, Realisation of one flip flop using other flip flop, Realisation of D Flip Flop using SR flip flop, Realisation of D Flip–Flop using JK flip–flop, Realisation of D flip flop using T Flip Flop, Realisation of JK flip flop using SR flip flop, Realisation of JK flip flop using D flip flop, Realisation of JK flip flop using T flip flop, Realisation of T flip flop using SR flip flop, Realisation of T flip flop using JK flip flop, State Reduction, State Reduction by Implication Table, State Assignment, Sequence Detector, Asynchronous Sequential Circuits, Analysis of Asynchronous Sequential Circuits (Fundamental Mode Circuits), Moore Type Synchronous State Machine, Mealy Type Synchronous Mealy Machine, Exercise.
6. Counters and Registers
Introduction, Counters, Asynchronous Counter (Ripple Counter), Asynchronous Decade Counter (BCD Ripple Counter), Synchronous Counter, Design of Synchronous Counter, Synchronous Decade Counter, UP/DOWN Counter (MOD–8), Shift Register Counters, Registers, Shift Registers, Exercise.
7. Logic Family
Introduction, Digital IC Terminology, Characteristics of Digital ICs, Bipolar Junction Transistor, Resistor Transistor Logic (RTL), Direct Coupled Transistor Logic (DCTL), Resistor Capacitor Transistor Logic (RCTL), Diode Transistor Logic (DTL), Modified DTL, High Threshold Logic (HTL), Transistor Transistor Logic (TTL), Emitter Coupled Logic (ECL), Mosfet Logic, Construction and Operation of MOSFET, CMOS Logic, Interfacing Logic Families [CMOS and TTL], Comparison of Different Logic Familes, Exercise.
P. Papers